1. Field of the Invention
The embodiments of the invention generally relate to integrated circuit structures and, more particularly, to an integrated circuit structure that incorporates a plurality of field effect transistors (FETs) at least one of which is formed with a nitride pullback technique to avoid divot formation at the channel width edges.
2. Description of the Related Art
Integrated circuit structures are often designed with trade-offs between performance and stability (i.e., between drive current and leakage current). For example, analog circuits may benefit more from stability than enhanced drive current. Contrarily, high power memory circuits (e.g., high power static random access memory (SRAM) arrays) may benefit more from enhanced drive current and capacitance than stability. In some circuits, such as high power logic circuits, this trade off may be at the transistor level and may differ for n-type field effect transistors (NFETs) as opposed to p-type field effect transistors (PFETs).